code	instruction

	0000	JMP		
	0001	JPZ	jump if zero	
	0010	JPC	jump if carry set
	0011	JNC	jump if carry zero
	0100	SET mask register	
	0101			
	0110
	0111	STA		
	1xxx    Mem to ACC (via ALU)

carry        = bit 0
mask disable =  "  1
acc disable  =  "  2

	1000	ADD then mask
	1001	ADD+1 then mask
	1010	ADD
	1011	ADD+1
	1100	mask
	1101	mask+1
	1110	LDA
	1111	LDA+1

I'm saying "mask" rather than "AND" because the AND operand
comes from a separate register (not the accumulator or memory)
	
				


Every instruction consists of two consecutive bytes

The first byte contains the 4 bit operand and the 4 msb address/operand bits
The second byte is the lower 8 bits of the address/operand

   IIIIaaaa aaaaaaaa

Each instruction cycle consists of a fetch/fetch/execute sequence
... made up of TEN 250nS machine states